Various integrated circuits utilize structures formed with a thin layer of silicon dioxide (SiO.sub.2) for various purposes. For example, a thin layer of silicon dioxide is used as a protection structure for on-chip resistors. As integrated circuit technologies become smaller, it is advantageous for all structures to become smaller, including thin silicon dioxide layers.
Suitably thin silicon dioxide layers can be formed using a conventional method of thermal oxide deposition. However, the high thermal budget associated with thermal oxide consumes silicon and drives source/drain (S/D) implantation further so that the source/drain implant is not easily controlled.
An advantageous alternative to thermal oxide deposition of thin silicon dioxide layers is deposition using the plasma-enhanced chemical vapor deposition (PECVD) technique. However, one of the concerns with conventional PECVD methods is that they do not allow deposition of layers less than about 1000 angstroms.
The process for producing a very thin (less than 350 angstroms) layer of silicon dioxide by PECVD was described in U.S. Pat. No. 5,736,423. In this reference, the time duration of pre-coating and soak time steps of the PECVD process were substantially increased, and the flow of silane (SiH.sub.4) was substantially reduced, as well as the applied pressure and high-frequency power. Deposition rates were lowered from the previously conventional process of 5500 angstroms per minute to 1700 angstroms per minute.
Although U.S. Pat. No. 5,736,423 provides a process that reduces the deposition rate to provide a more controllable process, further improvements in the deposition rate for a better process control are desirable. At the same time, with a super low deposition rate, the film still needs to be dense, silicon rich, highly compressive, with excellent step coverage and acceptable thickness uniformity.